1. Field of Invention
This invention relates to wireless communications systems. Specifically, the present invention relates to memory-efficient turbo decoders employed in wireless Code Division Multiple Access (CDMA) communications systems.
2. Description of the Related Art
Cellular telecommunications systems are characterized by a plurality of mobile transceivers, such as mobile phones, in communication with one or more base stations. Each transceiver includes a transmitter and a receiver.
In a typical CDMA transceiver, an analog radio frequency (RF) signal is received by an antenna and downconverted by an RF section to an Intermediate Frequency (IF). Signal processing circuits perform noise filtering and adjust the magnitude of the signal via analog automatic gain control (AGC) circuitry. An IF section then mixes the signal down to baseband and converts the analog signal to a digital signal. The digital signal is then input to a baseband processor for further signal processing, such as turbo decoding, to output voice or data.
Similarly, the transmitter receives a digital input from the baseband processor and converts the input to an analog signal. The digital input signal is often a turbo-encoded signal. This signal is then filtered and upconverted by an IF stage to an intermediate frequency. The gain of the transmit signal is adjusted and the IF signal is converted to RF in preparation for radio transmission.
The link between a transmitter and a receiver is a channel. To increase system capacity, receivers in the mobile stations and base stations must effectively operate at lower Signal-to-Interference Ratios (SIRs), or the SIR of the channel must be increased. Special coding schemes are often employed to reduce the required SIR.
Coding for communications signals involves the addition of redundant information to the signals. By strategically adding redundancy to communications signals transmitted in noisy environments, errors introduced by a noisy channel are reduced to a desired level. As shown by Claude Shannon in 1948, if the information rate of the communications signals is less than the channel capacity, the desired noise level is attainable without a reduction of the information rate. If redundancy is not employed in a noisy environment, error-free performance is difficult or impossible to obtain.
To improve the performance of a wireless communications system in a noisy and Raleigh-faded environment, interleavers following signal encoders are often employed. An interleaver spreads the codewords output from an encoder so that individual bits of a given codeword are separated and transmitted at different times. Consequently, bits of a given code experience independent fading, where the bits affected by an error burst belong to several codewords. At the receiver, received signal samples are deinterleaved before decoding. Several types of interleavers exist, including diagonal, convolutional, interblock, and block interleavers.
Turbo codes are serial or parallel concatenations of two or more constituent codes that have been separated by one or more code interleavers. Turbo encoders and decoders are often employed to improve error control and to reduce the required SIR. Turbo codes are often decoded with an interative algorithm to achieve low error rates at signal-to-noise (SNR) ratios approaching the Shannon limit. As an essential part of the turbo code, code interleavers and deinterleavers must be inserted between the component code encoders and decoders, respectively. The performance of turbo codes depends on the length and structure of the code interleavers. Good turbo code performance can be achieved by using interleavers having pseudo random structures.
In wireless CDMA communications systems, turbo encoders often produce parallel concatenations of a constituent convolutional code and one or more interleaved versions of the code. The encoders typically include one or more convolutional encoders connected through one or more interleavers. The corresponding turbo decoder generally includes inner and outer Logarithmic Maximum A Posteriori (log-MAP) decoders connected in a loop having an interleaver and a deinterleaver. The loop implements an iterative algorithm to approximate a Log Likelihood Ratio (LLR). Conventionally, if an LLR greater than 0, the decoded bit is most likely 1, and if the LLR less than 1, the decoded bit is most likely 0. Based on the LLRs, the decoder outputs either a 1 or a 0 representing a hard decision. The recursive process employed to determine the LLRs is called the Log-MAP Algorithm and includes two instances of the metric calculator, one performing a forward recursion and the other performing a backward recursion.
To enhance the efficiency and cost of turbo decoders, one or more of the constituent decoders is often replaced with a multiplexer and two extrinsic memories. The multiplexer controls signaling through the turbo decoder loop so that a single decoder may replace one or more decoders while maintaining the functional integrity of the turbo decoder.
Unfortunately, such turbo decoders often require at least two extrinsic memories, one to store information from one loop section while the decoder is used for the other loop section and visa versa. The extrinsic memory banks are often large and expensive, yielding large and expensive wireless communications devices.
Hence, a need exists in the art for a cost-effective and space-efficient turbo decoder for use in a CDMA system that does not require dual extrinsic memory banks. There exists a further need for a wireless communications system employing the space-efficient turbo decoder and a corresponding method for obviating the need for dual memories in accompanying turbo decoders. There exists a further need for an efficient dual port extrinsic memory adapted for use with the space-efficient turbo decoder of the present invention.
The need in the art is addressed by the system for eliminating a redundant memory bank in a digital circuit while maintaining the overall functional integrity of the digital circuit. In the illustrative embodiment, the disclosed turbo decoder circuit is adapted for use in a turbo decoder of a wireless communications system. The disclosed turbo decoder includes a first mode of operation in which the turbo decoder uses a first functional loop. The first functional loop includes a memory bank, a read interleaver, a first multiplexer (MUX), a RAM file, a log-MAP decoder, a write interleaver, and a second MUX. The disclosed turbo decoder further includes a second mode of operation in which a second functional loop is used. The second functional loop includes the memory bank, the first MUX, the RAM file, the log-MAP decoder, and the second MUX.
In one embodiment, the memory bank is a dual port extrinsic memory. The disclosed turbo decoder circuit switches between the first mode and the second mode.
The disclosed method and apparatus eliminates the need for an two extrinsic memories in a turbo decoder by selectively employing a single extrinsic memory for use in two separate decoder functional sections and for two different operational modes.